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<TITLE>Richard Newton</TITLE>
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<H1><!WA0><IMG SRC="http://www.cs.berkeley.edu/People/Faculty/Images/newton.gif" ALT=""> Richard Newton</H1>

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Ph.D., University of California at Berkeley
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<P>
Professor<BR>
(510) 642-2967<BR>
<!WA1><A HREF="mailto:newton@eecs.berkeley.edu">newton@eecs.berkeley.edu</A>
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<H2>Awards/Lectureships </H2>

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<LI>
C. Holmes McDonald Distinguished Teaching Award, Eta Kappa Nu Society,
1986<BR>

<LI>
Best Paper Award, ACM/IEEE Design Automation Conference, 1990<BR>

<LI>
Best Paper, IEEE Computer-Aided Design of Integrated Circuits
and Systems, 1989<BR>

<LI>
Best Paper Award, IEEE International Conference on Computer Design, 1988<BR>

<LI>
Best Paper Award, ACM/IEEE Design Automation Conference, 1987<BR>

<LI>
Best Paper Award, European Solid-State Circuit Conference, 1983<BR>

<LI>
Distinguished Lecturer, IEEE Circuits and Systems Society, 1985-1986<BR>

</UL>

<H2>Editorships/Program Committees</H2>

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<LI>
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<STRONG>General Chair</STRONG><BR>
<I>ACM/IEEE Design Automation Conference, 1991</I>
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<LI> 
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<STRONG>Member</STRONG><BR>
<I>Technical Advisory Board, CAD Framework Initiative (CFI)</I>
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<LI>
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<STRONG>Organizer</STRONG><BR>
<I>ACM Workshop on Synthesis, Simulation and Physical Design, 
Leningrad, USSR, 1991</I>
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<LI>
<P>
<STRONG>Associate Editor</STRONG><BR>
<I>IEEE Transactions on Computer-Aided Design, 1985-1988</I>
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<LI>
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<STRONG>Member</STRONG><BR>
<I>Technical Program Committee, IEEE International Conference on
     Computer Aided Design, 1989-1990</I>
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<LI>
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<STRONG>Member</STRONG><BR>
<I>Technical Program Committee, IEEE International Conference on
      Computer Aided Design, 1984-1986</I>
</P>

</UL>

<H2>Selected Publications</H2>

<UL>

<LI>
<P>
<STRONG>Test Generation and Verification for Highly Sequential Circuits</STRONG><BR>
(with A. Ghosh and S. Devadas), <I>IEEE Trans. Computer-Aided Design, 
</I>Vol. 10, No. 5, May 1991, pp. 652-667.
</P>

<LI>
<P>
<STRONG>Exact Algorithms for Output Encoding, State Assignment, and 
Four-Level Boolean Minimization</STRONG><BR>
(with S. Devadas), <I>IEEE Trans. 
Computer-Aided Design, </I>Vol. 10, No. 1, January 1991, pp. 13-27.
</P>

<LI>
<P>
<STRONG>Alpha-Power Law MOSFET Model and Its Applications to CMOS Inverter 
Delay and Other Formulas</STRONG><BR>
(with T. Sakurai), <I>IEEE J. Solid-State Circuits, </I>
Vol. 25, No. 2, April 1990, pp. 584-594.
</P>

<LI>
<P>
<STRONG>Electronic CAD Frameworks</STRONG><BR>
(with D. S. Harrison, <I>R. L. Spickelmier, 
</I>and T. J. Barnes), Proc. IEEE, Vol. 78, No. 2, February 1990, 
pp. 393-417 (invited).
</P>

<LI>
<P>
<STRONG>A Synthesis and Optimization Procedure for Fully and Easily Testable 
Sequential Machines</STRONG><BR>
(with S. Devadas, H.-K. Ma, and A. L. 
Sangiovanni-Vincentelli), <I>IEEE Trans. Computer-Aided Design,</I> Vol. 8, 
No. 10, October 1989, pp. 1100-1107.
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